[公司名稱] Analog Device ( ADI , 雅德諾半導體) [公司網站] https://www.analog.com/en/index.html [公司地址] No. 223號, 臺北市松江路223號 [公司介紹] 世界第二大類比設計場,不久前併購第三大美信 坐二望一準備飛天 （拍謝國文沒學好） 有興趣請寄信到 [email protected] 或是站內信 謝謝 Job Title: Senior Analog Design Engineer In this position, your primary focus will be signal chain and sub blocks desig n, including ADC, DAC and various Amplifiers, you will also have opportunities to participate in the design of power converters and other supporting circuit ry across CMOS/BCD process nodes. Responsibilities ‧ Participate in cutting-edge analog and mix-signal IC development. ‧ Work with cross functional teams and cross sites, contribute to the be st sign topology and methodology for a given application. ‧ Develop the product objective specification document that includes di e e estimation, package selection, pin descriptions, block diagrams and all aspe ct of IC electrical specifications. ‧ Model and Design from beginning to end which includes top level modeli ng chematic captures, and simulations. ‧ Select the appropriate process that maximizes the value of the final I C duct with the best engineering trade-offs. ‧ Oversee the IC layout and provide guidance to the demo-board PCB layou t. ‧ IC bench verifications, failure analysis and yield improvements suppor t. Required Skills and Qualifications ‧ Master or PHD in Electrical Engineering with experience in analog/mixe d- nal IC development ‧ Strong skills in CMOS analog design and layout ‧ Strong s-domain and z-domain analysis skills ‧ Organized, thorough, and detail-oriented with strong communication ski ll ‧ Self-motivated with strong analytical and problem-solving skills ‧ Ability to work with a sense of urgency and thrive in a dynamic enviro nm Preferred Skills and Qualifications ‧ Knowledge of discrete-time and continuous-time signal processing ‧ Experience in system and behavioral modeling ‧ Experience in Delta-Sigma ADC/DAC, SAR ADC and Power Amplifiers. ‧ Good silicon debug skills ‧ Understanding of layout ‧ Understanding of reliability concerns ‧ Different CMOS processes and geometry nodes -- ※ 發信站: 批踢踢實業坊(ptt.cc), 來自: 211.22.149.37 (臺灣) ※ 文章網址: https://webptt.cc/bbs/Tech_Job/M.1643099577.A.27D.html 拍謝國文沒學好 已修正已被同事嗆 ※ 編輯: hiippo (211.22.149.37 臺灣), 01/25/2022 17:03:57 鄉民真的好幽默 謝謝各位花時間勘錯 不過我也沒打算花時間改 謝謝大家寶貴的時間 再麻煩各位幫忙介紹人喔感恩 ※ 編輯: hiippo (211.22.149.37 臺灣), 01/25/2022 23:01:32